A configuration has been known, as prior art, that performs reception processing by means of direct discrete time sampling of a high-frequency signal with the aim of achieving small size and low power consumption of a receiver and integrating the analog signal processing section and digital signal processing section (see Patent Literature 1).
FIG. 1 shows the overall configuration of a sampling circuit disclosed in Patent Literature 1. FIG. 2 shows control signals inputted to the circuit shown in FIG. 1. The sampling circuit shown in FIG. 1 performs frequency conversion on a received analog RF signal using a multi-tap direct sampling mixer to obtain a discrete time analog signal. To be more specific, electrical charge transfer between capacitors included in the sampling circuit in FIG. 1 realizes filter characteristics resulting in the product of an FIR (finite impulse response) filer and an IIR (infinite impulse response) filter. Characteristics around the passband are determined based on second-order IIR filter characteristics. FIG. 3A shows an example of wideband frequency characteristics, and FIG. 3B shows an example of narrowband frequency characteristics nearby the passband.
In addition, as a prior art based on the above-described configuration, a configuration allowing image rejection has been known (Patent Literature 2).
FIG. 4 shows the overall configuration of the sampling circuit disclosed in Patent Literature 2. FIG. 5 shows an example of frequency characteristics obtained by the circuit shown in FIG. 4 (here local (LO) frequency fLO=800 MHz). The frequency characteristics exhibit bilateral asymmetry centered around the LO frequency and allow image rejection.